The present invention relates to the use of at least one checksum to monitor whether stored addresses of replacement storage elements are correct.
In a memory circuit, e.g., a dynamic random access memory (DRAM) or a field programmable logic device, a plurality of memory cells are typically arranged in rows and columns for addressable access. For example, a DRAM chip may include 256 million cells (or more), which are arranged in an array of rows (activated by word lines) and columns (activated by bit lines).
In a conventional DRAM chip, one or more of the millions of cells of the memory array may be defective. In order to avoid the need to discard an entire DRAM chip, redundant cells are provided that may be substituted for the one or more defective cells. Usually, if a particular cell in the memory array is determined to be defective (e.g., during a manufacturing/test process), the entire row and/or column containing the defective cell is usually replaced by a redundant row and/or column. Herein, rows and/or columns of cells may be referred to as storage elements.
A conventional technique of substituting a defective storage element of the memory array with a replacement storage element involves using address fuses associated with the replacement storage element. The address fuses contain the address of the defective storage element of the memory array. Each address fuse includes a fusible link that may take on an unfused state or may be permanently modified to take on a fused state. The fused state may represent one of a logic zero (0) and one (1), and the unfused state may represent the other of the logic zero and one. In use, when the defective storage element of the memory array is addressed, a comparison of the incoming address and the address stored in the address fuses will match. This indicates that the replacement storage element should be accessed instead of the defective storage element of the memory array.
The conventional technique for replacing a defective storage element of the memory array with a replacement storage element does not permit a determination of whether the replacement address is correct (e.g., whether the replacement address has been corrupted in some way). Consequently, an inappropriate storage element of the memory array may be replaced by a replacement storage element if the associated address fuses contain an incorrect replacement address. This problem is exacerbated when a plurality of replacement addresses are stored as would be the case when many rows of memory cells are replaced and many columns of memory cells are replaced.
In view of the foregoing, there is a need in the art for a new memory and method in which it is possible to monitor whether one or more of the replacement addresses stored have been corrupted and, further, to determine which of the addresses have been corrupted.